Infineon Technologies AGIQE013N04LM6CGATMA1MOSFETs

Source-Down MOSFET Package Innovation: Solving the Power Density Challenge

The innovative Source-Down package flips the silicon die inside allowing for the source to be connected to the thermal pad. This offers significant benefits over today's Drain-Down industry standard by enabling a larger silicon die, reducing R_DS(on) and offering superior thermal performance. Infineon's Source-Down package supports the customer’s requirement for high power density and optimized system level efficiency. Additionally, new layout options offer more flexibility for PCB designers to improve thermal and electrical performance at the system level. The product family is currently available in 25V and 40V options with additional voltages being currently worked on.

Applications

• •  Drives
• •  SMPS
• •  Server
• •  Telecom
• •  OR-ing

Features

• •  Major reduction in R_DS(on) – up to 25 percent
• •  Superior thermal performance in R_thJC
• •  Optimized layout possibilities
• •  Standard and Center-Gate footprint

Benefits

• •  High current capability
• •  More efficient use of PCB area
• •  Highest power density and performance
• •  Optimized footprint for MOSFET parallelization with Center-Gate

Featured Articles & Videos

Application Note
E-Learning Presentation
Product Brief

Related Products

OPN	Product Description	Part Class	Static Sensitive	RoHS Compliant	Lead Free
IQE006NE2LM5CGATMA1	25V OptiMOS™ MOSFET in Source-Down PQFN 3.3x3.3 Center Gate	Low-voltage MOSFETs	T	Y	Y
IQE013N04LM6CGATMA1	40V OptiMOS™ MOSFET in Source-Down PQFN 3.3x3.3 Center Gate	Low-voltage MOSFETs	T	Y	Y

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