| RoHS (Unione Europea) | Compliant |
| ECCN (Stati Uniti) | 3A991 |
| Stato del componente | NRND |
| Codice HTS | 8542.31.00.60 |
| SVHC | Yes |
| Automotive | No |
| PPAP | No |
| Family Name | Stratix® V GX |
| Process Technology | 28nm |
| User I/Os | 552 |
| Number of Registers | 634000 |
| Operating Supply Voltage (V) | 0.85 |
| Shift Registers | Utilize Memory |
| Logic Elements | 420000 |
| Number of Multipliers | 512 (18x18) |
| Program Memory Type | SRAM |
| Embedded Memory (Kbit) | 37888 |
| Total Number of Block RAM | 1900 |
| EMACs | 2 |
| IP Core | RapidIO to AXI Bridge Controller (RAB)|Viterbi Compiler, Low-Speed/Hybrid Serial Decoder|Sub-frame Latency JPEG 2000 Encoder (BA130)|SPAUI MAC|RLDRAM II Controller Core |
| Provider Name | Altera/Barco Silex/Mobiveil, Inc/Commsonic |
| Device Logic Units | 420000 |
| Device Number of DLLs/PLLs | 24 |
| Transceiver Channels | 36 |
| JTAG Support | No |
| Transceiver Speed (Gbps) | 14.1 |
| Dedicated DSP | 256 |
| PCIe | 2 |
| Programmability | Yes |
| Reprogrammability Support | Yes |
| Number of Look-up Table Input | 8 |
| Copy Protection | No |
| In-System Programmability | Yes |
| Speed Grade | 2 |
| Differential I/O Standards | LVPECL|LVDS|HCSL |
| Single-Ended I/O Standards | LVTTL|LVCMOS |
| External Memory Interface | DDR2 SDRAM|DDR3 SDRAM|RLDRAM II|RLDRAM III|QDRII+SRAM |
| Minimum Operating Supply Voltage (V) | 0.82 |
| Maximum Operating Supply Voltage (V) | 0.88 |
| I/O Voltage (V) | 1.2|1.25|1.35|1.5|1.8|2.5|3 |
| Minimum Operating Temperature (°C) | -40 |
| Maximum Operating Temperature (°C) | 100 |
| Supplier Temperature Grade | Industrial |
| Tradename | Stratix |
