Analog DevicesEV-ADF4002SD1ZCartes et kits de développement d'horloge et minuteur
ADF4002 Clock Generator and Synthesizer Evaluation Board
| Compliant | |
| EAR99 | |
| Active | |
| 8473.30.11.80 | |
| Automotive | No |
| PPAP | No |
| Evaluation Board | |
| ADF4002 | |
| Clock Generator and Synthesizer | |
| USB | |
| 6/12 |
Description du kit de développement
This board is designed to allow the user to evaluate the perfor-mance of the ADF4002 frequency synthesizer for phase-locked loops (PLLs).which contains the footprint for an ADF4002 synthesizer, an SMA connector for the reference input, power supplies, and an RF output. There is also a footprint for a loop filter and a VCO on board.
The evaluation kit also contains software that is compatible with Windows® XP and later versions to allow easy programming of the synthesizer.
This board requires an SDP-S (system demonstration platform-serial) board (shown in Figure 1, but not supplied with the kit). The SDP-S allows software programming of the ADF4002 device.
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