Analog DevicesEV-ADF4002SD1Z时钟和计时开发板和套件
ADF4002 Clock Generator and Synthesizer Evaluation Board
| Compliant | |
| EAR99 | |
| Active | |
| 8473.30.11.80 | |
| Automotive | No |
| PPAP | No |
| Evaluation Board | |
| ADF4002 | |
| Clock Generator and Synthesizer | |
| USB | |
| 6/12 |
Dev Kit Description
This board is designed to allow the user to evaluate the perfor-mance of the ADF4002 frequency synthesizer for phase-locked loops (PLLs).which contains the footprint for an ADF4002 synthesizer, an SMA connector for the reference input, power supplies, and an RF output. There is also a footprint for a loop filter and a VCO on board.
The evaluation kit also contains software that is compatible with Windows® XP and later versions to allow easy programming of the synthesizer.
This board requires an SDP-S (system demonstration platform-serial) board (shown in Figure 1, but not supplied with the kit). The SDP-S allows software programming of the ADF4002 device.
设计 AI 驱动的医疗设备
阅读 Arrow 白皮书,掌握系统设计技巧、器件推荐与 AI 洞察,助力高效、安全打造医疗方案。

