What do the following design problems have in common?
An Internet of Things (IoT) design project has you developing a pulse oximeter to measure the amount of oxygen compared to hemoglobin in a patient’s blood. Typically, a pair of LEDs face a photodiode through a translucent portion of a patient’s body, such as a fingertip. An optical transmitter triggers both a red LED and an infrared LED. A photodiode receives the two signals and converts the current from the light into a voltage. So you have to specify an analog-to-digital converter (ADC) to measure the voltage, then transmit the digital data across an isolation barrier to a data collection system for storage or display. The basic requirements of the ADC you specify are a small footprint, low power dissipation, more than enough sampling bandwidth to correctly sample the voltage, no data latency, and if possible, pin compatibility with parts used in a previous design. Your task: selecting the best supplier and part to meet these requirements.
You are designing an RF device and intermodulation distortion (IMD) is driving you crazy. IMD results when nonlinearity in a circuit or device creates new frequency components not in the original signal. It includes the effects of harmonic distortion and two-tone distortion; the latter occurs because an application can use two different sine wave tones with different phases and amplitudes (such as in a software-defined radio). These two tones can generate IMD, which can override the smaller amplitude signals of the application. So you are looking for an ADC (for the receiver) and DAC (transmitter) with outstanding IMD and SNR specs. Where do you go?
This project involves a seismic monitor, which requires evaluating a signal with great precision, but you also have to have some bandwidth. But more bandwidth means more noise. So you’ve concluded, correctly, that you will need two digital data streams.
Traditionally, that would mean using two ADCs, one for each data stream with one optimized for accuracy and the other for bandwidth and noise. The rub is your manager has asked you to find a way to do it with a single ADC that can handle both data streams. What do you do?
The solution in each of the cases presented above, as well as in many, many other design predicaments engineers find themselves facing, is an Analog Devices data converter.
For three decades, Analog Devices' Power by Linear has made a name for itself manufacturing and marketing a broad line of high-performance analog ICs for its worldwide customers. But you may not be aware that for more than 20 years, the company has also applied its engineering prowess to a growing portfolio of high-speed and precision ADCs and DACs. Analog Devices' ADCs provide solutions for applications ranging from 24-bit precision measurements to 250Msps communications systems. Its DACs offer a range of resolutions, output ranges, and package densities. So the chances are better than excellent that you will find an Analog Devices' Power by Linear ADC or DAC to suit your design specifications, regardless of whether the emphasis is on resolution, sample rate, accuracy, bandwidth, power efficiency, size, and/or value.
Exemplary SAR ADCs
The design engineer selecting an ADC is confronted with a variety of parameters to consider. Among them are resolution, how finely the data converter can resolve a given signal, and accuracy — how well the quantization levels match the true analog signal. Let’s start with resolution and the question of how many bits you need, since the bit value of an analog-to-digital converter refers directly to its resolution. Here, you should know that Analog Devices offers a complete family of high-performance ADC products, including 16-bit to 24-bit delta sigma converters for precision measurements, up to 16-bit high speed pipeline ADCs for communications, and 8-bit to an outstanding 32-bit low-power successive approximation register (SAR) ADCs for everything in between. Let’s consider SAR ADCs for a moment. Frequently the architecture of choice for medium-to-high-resolution applications, SAR ADCs are the workhorses of data acquisition systems, in particular when multiple channels require input multiplexing. With a wide range of applications, SAR ADCs also find use in medical imaging, portable (battery-powered) instrumentation, industrial process control, and in a large variety of general purpose apps, such as temperature sensing.
Figure 1: LTC2380-24 Typical Application Configuration.
Figure 2: LTC2380-24 Block Diagram with Digital Averaging Filter.
Analog Devices offers a wide range of general purpose SAR ADCs with sample rates up to 15Msps with no latency operation. Resolutions offered range from as low as 8 bits up to industry-leading 20-bit and 32-bit SAR ADCs, from single-channel to multiplexed/simultaneous sampling ADCs with parallel and serial interfaces.
If you’ve worked with SAR ADCs, you probably know that they are often limited to 16 or 18 bits of precision; there are not many 24-bit SAR ADCs on the market. As such, Analog Devices' Power by Linear’s LTC2380-24 is exceptional in that it offers a 24-bit SAR option that runs at 2Msps.
Equally important, the LTC2380-24 is a no latency 24-bit ADC; latency being defined as the difference between the time when an analog sample is acquired by the ADC and the time when the digital data is available at the output. No latency is important for applications that want to take an instantaneous measurement without incurring delays.
Another key parameter is dynamic range, which is influenced by factors including resolution, linearity, and accuracy (how well the quantization levels match the true analog signal), as well as by the small timing errors known as jitter. Dynamic range is important in applications where signal strengths vary dramatically; the noise spectral density is approximately 40nV/√Hz, which equates to a dynamic range of 159dB at 1.5Msps. The lower the noise spectral density of an ADC (the amount of noise in 1Hz bandwidth), the better the ADC’s ability to resolve very low signals using averaging. The LTC2380-24 achieves 145dB dynamic range in part by reducing noise via an on-chip digital filter that averages conversion results; averaging suppresses the noise that is uncorrelated to the signals. In so doing, the filter also eliminates the processing burden from the digital host (e.g., FPGA or uP), conserving power. Since using an ADC is the usual method of bringing analog inputs into a microprocessor, a valuable feature here is that the microprocessor-friendly LTC2380-24 allows results to be read out with a serial clock as low as the sampling rate (that is, 2MHz), easing interfacing and enabling use with slower devices.
With the future of high-speed converters being defined at least in part by lower power consumption, the LTC2380-24 is ahead of the curve, consuming only 28mW. It automatically powers down between conversions, reducing power dissipation at lower sampling rates. Ideal for seismic, medical, and many other applications, the LTC2380-24 is drop-in compatible with the LTC2378-20 family of 20-bit 1Msps no latency SAR ADCs (including the 18- and 16-bit versions), allowing easy system upgrades to 24 bits.
Figure 3: Distributed Read Operation While Averaging 25 Samples.
LTC2387-18
Ideally suited for a wide range of applications ranging from high-speed data acquisition to imaging to communications, the LTC2387-18 is a low-noise, high-speed, 18-bit 15Msps device. Its combination of excellent linearity and wide dynamic range makes it very well suited for high-speed imaging and instrumentation applications. Dynamic range is important in applications where signal strengths vary dramatically; for the LTC2387-18, it is 16.8nV/√Hz, which equates to a dynamic range of 165dB when sampling at 15Msps.
With its ability to digitize wideband signals, the LTC2387-18 can replace pipeline ADCs in many applications where the analog input signal is in the first Nyquist zone. (By way of review, the frequency spectrum is divided into an infinite number of Nyquist zones, each having a width equal to 0.5fs, where fs is the sampling frequency. Pipeline ADCs are better suited for digitizing second and higher Nyquist zone analog signals, enabling undersampling.) A pipelined ADC employs a parallel structure in which each stage works concurrently on one to a few bits of successive samples. This parallelism increases throughput, but at the expense of power consumption and latency.
By replacing pipeline ADCs, designers can benefit from the LTC2387’s better SNR and better DC accuracy to gain a competitive edge. Its no latency operation enables use in data acquisition systems that require fast control loops. And while SAR ADCs are generally limited to slower sampling rates, the LTC2387-18 achieves sampling rates of up to 15Msps, making it the fastest SAR ADC on the market today.
In all, its high 95.7dB SNR and low distortion performance, combined with fast digitizing throughput, enable the LTC2387-18 to measure very low signal levels with greater precision and accuracy, thus improving image contrast and definition in high-end imaging applications.
Figure 4: Typical Application Configuration.
Figure 5: General Pipeline ADC Architecture.
High-Speed DACs with Unique Features
Let’s now turn to Analog Devices' DAC offerings, which include a range of resolutions, package densities, and output ranges. Resolutions offered span from 8-bit to industry-leading 18-bit DACs, and options range from single-channel to higher-density multichannel DACs with parallel, serial SPI, or I2C interfaces. Engineers examining the company’s DAC portfolio will find unmatched DC (INL, DNL, Offset, and Gain error) and AC performance (fast settling time, low glitch impulse, and crosstalk) with low power consumption and small package sizes. Unique features include integrated high-precision references, power-on-reset to zero-scale, and software selectable output spans (SoftSpan). SoftSpan output programming eliminates the need for external jumpers, precision resistors, and amplifier circuitry.
One of the newest examples of Analog Devices' Power by Linear DAC know-how is the LTC2000A, a family of 16-/14-/11-bit 2.7Gsps current-steering DACs with exceptional spectral purity. This DAC is optimized for high-end broadband wired and wireless communications and radar applications. To achieve high spectral purity, a DAC needs high SFDR (spurious-free dynamic range), linearity, and good phase noise, which can corrupt the DAC output and cause channel interference, limiting system efficiency. Some applications will not be possible with poor phase noise. For example, for Doppler radar to decipher close-in information, a component must offer low additive phase noise. To meet these stringent requirements, the LTC2000A has a low additive phase noise of 156dBc/Hz and boasts an SFDR of 80 dBc at a frequency output of 50 MHz and 72 dBc SFDR at 1080 MHz output.
Data is transferred to the LTC2000A over a parallel LVDS interface port with transfer rates of up to 1.35Gsps using a 675MHz double data rate (DDR) data clock. Dual DDR ports are required to achieve the 2.7Gsps update rate, while a single port can be used to operate at a lower 1.35Gsps update rate.
Designed for ease of use, the LTC2000A packs an internal pattern generator, LVDS loop-out multiplexer, and junction temperature sensing to simplify system development and debug. Operating at 2.7Gsps, the LTC2000A consumes 2.4W from dual 1.86-V and 3.3-V supplies, while at 1.35Gsps, the device consumes just 1.4W. It is offered in a 9mm x 15mm BGA package.
Figure 6: LTC2000A Block Diagram.