Analog DevicesEV-ADF4157SD1ZClock and Timing Development Boards and Kits
ADF4157 Clock Generator and Synthesizer Evaluation Board
| Compliant | |
| 5A991b. | |
| Active | |
| 8473.30.11.80 | |
| Automotive | No |
| PPAP | No |
| Evaluation Board | |
| ADF4157 | |
| Clock Generator and Synthesizer | |
| 10 | |
| 12(Max) |
Dev Kit Description
This evaluation board requires an SDP Controller board for connection to the PC. The SDP controller board connects to the PC via USB 2.0. The evaluation board will connect to the SDP controller board. The evaluation board cannot be connected directly to the PC. The evaluation software running on the PC will communicate through the SDP Controller board, to the evaluation board.
This evaluation board allows the user to evaluate the performance of the ADF4157 frequency synthesizer for phase-locked loops (PLLs). The SDP-S controller board allows software programming of the frequency synthesizer. Figure 1 shows the board, which contains the ADF4157 synthesizer, the power supplies, a TCXO reference, and an RF output signal. There is also a loop filter (20 kHz), a VCO (Z-Communications, Inc., V940ME03-LF), and an external reference SMA input. The evaluation board is set up for a 10 MHz PFD frequency.
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