LIFCL-40-8MG289C
Embedded vision and processing FPGA based on the Lattice Nexus platform with class-leading power, small form factor, reliability, and performance.
Lattice SemiconductorLattice CrossLink™-NX: Best-in-class Embedded Vision Processing FPGA
Built on the 28 nm FD-SOI Lattice Nexus™ platform, the CrossLink-NX family of FPGAs lead their class in power, small form factor, reliability, and performance. They are optimized to help developers create innovative embedded vision and AI solutions for communications, compute, industrial, automotive, and consumer systems.
Product Highlights
Applications: Lattice CrossLink-NX FPGAs are designed for embedded vision and processing applications including sensor and display bridging, sensor aggregation, sensor duplication, and AI inferencing at the Edge.
Benefits
Provides Best-in-class Performance for Vision Processing Applications – High memory to logic cell ratio, up to 170 bits per logic cell, accelerates AI inferencing.
High Speed Interfaces – 2.5 Gbps Hardened MIPI D-PHY, 5 Gbps PCIe, 1.5 Gbps programmable I/O, 1066 Mbps DDR3. Supporting LVDS, subLVDS, OpenLDI (OLDI), and SGMII.
Built on Lattice Nexus platform – Up to 75% lower power vs similar FPGAs and small form factor packaging with sizes as small as 4 mm x 4 mm.
Features
• Instant-on configuration – I/O configures in 3 ms, and device as fast as 8 ms
• FD-SOI programmable back bias enables per device performance / power optimization
• Two hardened 4-lane MIPI D-PHY transceivers at 10 Gbps per PHY
• Up to 37 programmable source synchronous I/O pairs for camera and display interfacing
• From 4 mm x 4 mm WLCS package (0.4 mm pitch) to 17 mm x 17 mm BGA package (0.8 mm pitch)
• Lowest soft error rate in its class, 100X more reliable than competition
Featured Content Section
Product Brief: MIPI Bridging and Edge AI Combined Into One FPGA
White Paper: Lattice Crosslink-NX: Embedded Vision Processing at the Edge
Lattice mVision Solutions Stack Accelerate Implementation of Low Power Embedded Vision Applications
Build FPGA-Based Processor Systems in Minutes
Product Brief: Predictable FPGA Design Convergence
Product Selector Guide: Ultra-Low Power Lattice sensAI™ Stack
Product Technical Specifications
Search Results
Related Searches
1. vision FPGA
2. FD-SOI
3. Lattice Nexus
4. edge computing
5. artificial intelligence
6. human presence
7. sensor
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|---|---|---|
| LIFCL-40-EVN |
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Product Technical Specifications
RoHS EU
Compliant
ECCN (USA)
EAR99
HTS
8542.31.00.60
Automotive
No
PPAP
No
Familienname
CrossLink-NX
Prozesstechnologie
28nm
Max. Anzahl der Anwendungs-E/A
74
Anzahl der E/A-Bänke
8
Typische Betriebsversorgungsspannung (V)
1
Bausteinlogikzellen
39000
Anzahl der Multiplikatoren
56 (18x18)
Programmspeicherart
SRAM
RAM-Bits (Kbit)
1512
Gesamtanzahl des Block-RAMs
2
Max. verteilte RAM-Bits
245760
Baustein-Logikeinheiten
39000
Baustein-Anzahl der DLLs/PLLs
3
Programmierbarkeit
Yes
Umprogrammierbar
No
Kopierschutz
No
Im System programmierbar
No
Geschwindigkeitsgrad
8
Mindestbetriebsspannung (V)
0.95
Max. Betriebsversorgungsspannung (V)
1.05
E/A-Spannung (V)
3.3, 2.5, 1.8, 1.5, 1.35, 1.2, 1
Mindestbetriebstemperatur (°C)
0
Max. Betriebstemperatur (°C)
85
Temperaturbereich Lieferant
Commercial
Handelsname
CrossLink™
Befestigung
Surface Mount
Leiterplatte geändert
289
Standard-Verpackungsname
BGA
Lieferantenverpackung
CSBGA
Stiftanzahl
289
Family/Series
LIFCL-40
ROHS Version
2011/65/EU, 2015/863

