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フィールドプログラマブルゲートアレイ - FPGA

ICE40LP384SG32 | iCE40 LP/HX FPGA

FPGA iCE40 LPFamily 384Cells 1.2V 32-Pin QFN EP Tray

Lattice Semiconductor

製品技術仕様

• EU RoHS

  Compliant

• ECCN (US)

  EAR99

• Part Status

  Active

• HTS

  COMPONENTS

• Automotive

  No

• PPAP

  No

• Family Name

  iCE40 LP

• Process Technology

  40nm

• User I/Os

  21

• Number of I/O Banks

  4

• Operating Supply Voltage (V)

  1.2

• Logic Elements

  384

• Program Memory Type

  SRAM

• Device Logic Units

  384

• Number of Global Clocks

  8

• JTAG Support

  No

• Programmability

  Yes

• Reprogrammability Support

  Yes

• Number of Look-up Table Inputs

  4

• Copy Protection

  No

• In-System Programmability

  No

• Maximum Differential I/O Pairs

  8

• Minimum Operating Supply Voltage (V)

  1.14

• Maximum Operating Supply Voltage (V)

  1.26

• I/O Voltage (V)

  1.2, 1.5, 1.8, 2.5, 3.3

• Minimum Operating Temperature (°C)

  -40

• Maximum Operating Temperature (°C)

  100

• Supplier Temperature Grade

  Industrial

• Packaging

  Tray

• Tradename

  iCE40

• Mounting

  Surface Mount

• Package Height

  0.88

• Package Width

  5

• Package Length

  5

• PCB changed

  32

• Standard Package Name

  QFN

• Supplier Package

  QFN EP

• Pin Count

  32

• Lead Shape

  No Lead