복잡 프로그래머블 로직 장치 - CPLD

EPM3256AQC208-7N

CPLD MAX® 3000AFamily 5KGates 256Macro Cells 126.6MHz 3.3V 208-Pin PQFP Tray

Altera

製品技術仕様

• 유럽 연합 RoHS 명령어

  Compliant

• 미국수출통제분류ECCN 인코딩

  EAR99

• 친환경 무연

  Obsolete

• 미국 세관 상품 코드

  COMPONENTS

• SVHC

  Yes

• Automotive

  No

• PPAP

  No

• Family Name

  MAX® 3000A

• Program Memory Type

  EEPROM

• Number of Logic Blocks/Elements

  16

• Number of Global Clocks

  2

• Number of Macro Cells

  256

• Product Terms

  32

• Device System Gates

  5000

• Data Gate

  No

• Maximum Number of User I/Os

  158

• In-System Programmability

  Yes

• Programmability

  Yes

• Reprogrammability Support

  Yes

• Maximum Internal Frequency (MHz)

  166.67

• Maximum Internal Frequency (MHz)

  126.6

• Maximum Clock to Output Delay (ns)

  4.8

• Maximum Propagation Delay Time (ns)

  7.5

• Speed Grade

  7

• Individual Output Enable Control

  Yes

• Minimum Operating Supply Voltage (V)

  3

• Maximum Operating Supply Voltage (V)

  3.6

• Typical Operating Supply Voltage (V)

  3.3

• I/O Voltage (V)

  2.5|3.3

• Tolerant Configuration Interface Voltage (V)

  2.5|3.3|5

• Minimum Operating Temperature (°C)

  0

• Maximum Operating Temperature (°C)

  70

• Supplier Temperature Grade

  Commercial

• Packaging

  Tray

• Tradename

  MAX

• Mounting

  Surface Mount

• Package Height

  3.4

• Package Width

  28

• Package Length

  28

• PCB changed

  208

• Standard Package Name

  QFP

• Supplier Package

  PQFP

• Pin Count

  208

• Lead Shape

  Gull-wing