Analog DevicesADCLK854/PCBZ时钟和计时开发板和套件
ADCLK854 Clock Buffer and Driver Evaluation Board
| Compliant | |
| EAR99 | |
| Active | |
| 8473.30.11.80 | |
| Automotive | No |
| PPAP | No |
| Evaluation Board | |
| ADCLK854 | |
| Clock Buffer and Driver | |
| 1.8 |
Dev Kit Description
ADCLK854 1.8 V, 12-LVDS/24-CMOS Output, Low Power Clock Fanout Buffer Evaluation Board.
The ADCLK854 is a 1.2 GHz/250 MHz LVDS/CMOS fanout buffer optimized for low jitter and low power operation. Possible configurations range from 12 LVDS to 24 CMOS outputs, including combinations of LVDS and CMOS outputs.
| EDA / CAD Models |
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