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TSM6502CRRLG|TSC|simage
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MOSFET

TSM6502CR RLG

Trans MOSFET N/P-CH 60V 5.4A/4A 8-Pin PDFN EP T/R

Taiwan Semiconductor
Fiches techniques 

Spécifications techniques du produit
  • EU RoHS
    Compliant with Exemption
  • ECCN (US)
    EAR99
  • Part Status
    Active
  • HTS
    8541.29.00.55
  • SVHC
    Yes
  • SVHC Exceeds Threshold
    Yes
  • Automotive
    No
  • PPAP
    No
  • Category
    Power MOSFET
  • Configuration
    Dual Dual Drain
  • Channel Mode
    Enhancement
  • Channel Type
    N, P
  • Number of Elements per Chip
    2
  • Maximum Drain-Source Voltage (V)
    60
  • Maximum Gate-Source Voltage (V)
    ±20
  • Maximum Continuous Drain Current (A)
    5.4@N Channel, 4@P Channel
  • Maximum Drain-Source Resistance (mOhm)
    34@10V@N Channel, 68@10V@P Channel
  • Typical Gate Charge @ Vgs (nC)
    10.3@4.5V, 20.8@10V@N Channel, 9.5@4.5V, 18.1@10V@P Channel
  • Typical Gate Charge @ 10V (nC)
    20.8@N Channel, 18.1@P Channel
  • Typical Input Capacitance @ Vds (pF)
    1159@30V@N Channel, 930@30V@P Channel
  • Maximum Power Dissipation (mW)
    2000
  • Typical Fall Time (ns)
    18@N Channel, 44@P Channel
  • Typical Rise Time (ns)
    25@N Channel, 28@P Channel
  • Typical Turn-Off Delay Time (ns)
    18@N Channel, 44@P Channel
  • Typical Turn-On Delay Time (ns)
    7.4@N Channel, 4@P Channel
  • Minimum Operating Temperature (°C)
    -55
  • Maximum Operating Temperature (°C)
    150
  • Packaging
    Tape and Reel
  • Mounting
    Surface Mount
  • Package Height
    1
  • Package Width
    5.75
  • Package Length
    4.9
  • PCB changed
    8
  • Standard Package Name
    DFN
  • Supplier Package
    PDFN EP
  • Pin Count
    8
Quantité de commande

Documentation et ressources

Fiches techniques
Ressources de conception