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IS61WV10248EDBLL10TLI|ISSI|simage
IS61WV10248EDBLL10TLI|ISSI|limage
SRAM 칩

IS61WV10248EDBLL-10TLI

SRAM Chip Async Single 2.5V/3.3V 8M-bit 1M x 8 10ns 44-Pin TSOP-II

Integrated Silicon Solution Inc
Fiches techniques 

Spécifications techniques du produit
  • 유럽 연합 RoHS 명령어
    Compliant
  • 미국수출통제분류ECCN 인코딩
    3A991b.2.a.
  • 친환경 무연
    Active
  • 미국 세관 상품 코드
    IS61WV10248EDBLL-10TLI
  • Automotive
    No
  • PPAP
    No
  • Chip Density (bit)
    8M
  • Number of Words
    1M
  • Number of Bits/Word (bit)
    8
  • Data Rate Architecture
    SDR
  • Address Bus Width (bit)
    20
  • Number of Ports
    1
  • Timing Type
    Asynchronous
  • Max. Access Time (ns)
    10
  • Minimum Operating Supply Voltage (V)
    2.4
  • Typical Operating Supply Voltage (V)
    2.5|3.3
  • Maximum Operating Supply Voltage (V)
    3.6
  • Operating Current (mA)
    50
  • Minimum Operating Temperature (°C)
    -40
  • Maximum Operating Temperature (°C)
    85
  • Supplier Temperature Grade
    Industrial
  • Mounting
    Surface Mount
  • Package Height
    1.05(Max) mm
  • Package Width
    10.29(Max) mm
  • Package Length
    18.52(Max) mm
  • PCB changed
    44
  • Standard Package Name
    SO
  • Supplier Package
    TSOP-II
  • Pin Count
    44
  • Lead Shape
    Gull-wing

Documentation et ressources

Fiches techniques
Ressources de conception