Logic Gates

74AUP1G09GW,125

AND Gate 1-Element 2-IN 5-Pin TSSOP T/R

Nexperia

Spécifications techniques du produit

• EU RoHS

  Compliant

• ECCN (US)

  EAR99

• Part Status

  Active

• HTS

  8542.39.00.90

• SVHC

  Yes

• Automotive

  No

• PPAP

  No

• Logic Family

  AUP

• Logic Function

  AND

• Number of Elements per Chip

  1

• Number of Element Inputs

  2-IN

• Number of Output Enables per Element

  0

• Number of Selection Inputs per Element

  0

• Number of Element Outputs

  1

• Maximum Propagation Delay Time @ Maximum CL (ns)

  8.9@2.3V to 2.7V|11.5@1.4V to 1.6V|12.1@1.65V to 1.95V|12.7@3V to 3.6V|19.5@1.1V to 1.3V

• Absolute Propagation Delay Time (ns)

  24

• Process Technology

  0.35um

• Output Type

  Open Drain

• Maximum Low Level Output Current (mA)

  4

• Minimum Operating Supply Voltage (V)

  0.8

• Typical Operating Supply Voltage (V)

  3.3|2.5|1.8

• Maximum Operating Supply Voltage (V)

  3.6

• Maximum Quiescent Current (uA)

  0.5

• Propagation Delay Test Condition (pF)

  30

• Minimum Operating Temperature (°C)

  -40

• Maximum Operating Temperature (°C)

  125

• Packaging

  Tape and Reel

• Mounting

  Surface Mount

• Package Height

  0.9

• Package Width

  1.25

• Package Length

  2

• PCB changed

  5

• Standard Package Name

  SO

• Supplier Package

  TSSOP

• Pin Count

  5

• Lead Shape

  Gull-wing