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SN74LVT125DR|TI|simage
SN74LVT125DR|TI|limage
Buffers and Line Drivers

SN74LVT125DR

Buffer/Line Driver 4-CH Non-Inverting 3-ST 14-Pin SOIC T/R

Texas Instruments

Spécifications techniques du produit
  • EU RoHS
    Compliant
  • ECCN (US)
    EAR99
  • Part Status
    Active
  • HTS
    8542.39.00.90
  • Automotive
    No
  • PPAP
    No
  • Logic Family
    LVT
  • Logic Function
    Buffer/Line Driver
  • Number of Elements per Chip
    4
  • Number of Channels per Chip
    4
  • Number of Inputs per Chip
    4
  • Number of Input Enables per Chip
    0
  • Number of Outputs per Chip
    4
  • Number of Output Enables per Chip
    4 Low
  • Bus Hold
    Yes
  • Polarity
    Non-Inverting
  • Maximum Propagation Delay Time @ Maximum CL (ns)
    2.9(Typ)@3.3V
  • Absolute Propagation Delay Time (ns)
    6.5
  • Input Signal Type
    Single-Ended
  • Output Type
    3-State
  • Maximum Low Level Output Current (mA)
    64
  • Maximum High Level Output Current (mA)
    -32
  • Minimum Operating Supply Voltage (V)
    2.7
  • Typical Operating Supply Voltage (V)
    3.3
  • Maximum Operating Supply Voltage (V)
    3.6
  • Tolerant I/Os (V)
    5
  • Typical Quiescent Current (uA)
    4500
  • Maximum Quiescent Current (uA)
    7000
  • Propagation Delay Test Condition (pF)
    50
  • Minimum Operating Temperature (°C)
    -40
  • Maximum Operating Temperature (°C)
    85
  • Packaging
    Tape and Reel
  • Mounting
    Surface Mount
  • Package Height
    1.5(Max)
  • Package Width
    3.9
  • Package Length
    8.65
  • PCB changed
    14
  • Standard Package Name
    SO
  • Supplier Package
    SOIC
  • Pin Count
    14
  • Lead Shape
    Gull-wing

Documentation et ressources

Fiches techniques
Ressources de conception