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SN74LV175APWR|TI|limage
SN74LV175APWR|TI|simage
Flip Flop

SN74LV175APWR

Flip Flop D-Type Bus Interface Pos-Edge Push-Pull 1-Element 16-Pin TSSOP T/R

Texas Instruments

Spécifications techniques du produit
  • RoHS (Unione Europea)
    Compliant
  • ECCN (Stati Uniti)
    EAR99
  • Stato del componente
    Active
  • Codice HTS
    8542.39.00.90
  • SVHC
    Yes
  • Automotive
    No
  • PPAP
    No
  • Logic Family
    LV
  • Logic Function
    D-Type Bus Interface
  • Number of Channels per Chip
    4
  • Number of Elements per Chip
    1
  • Number of Element Inputs
    4
  • Number of Element Outputs
    4
  • Bus Hold
    No
  • Set/Reset
    Master Reset
  • Polarity
    Inverting/Non-Inverting
  • Triggering Type
    Positive-Edge
  • Maximum Propagation Delay Time @ Maximum CL (ns)
    23.3@2.5V|15@3.5V|9.3@5V
  • Absolute Propagation Delay Time (ns)
    27
  • Process Technology
    130nm
  • Input Signal Type
    Single-Ended
  • Output Type
    Push-Pull
  • Maximum Low Level Output Current (mA)
    12
  • Maximum High Level Output Current (mA)
    -12
  • Minimum Operating Supply Voltage (V)
    2
  • Typical Operating Supply Voltage (V)
    2.5|3.3|5
  • Maximum Operating Supply Voltage (V)
    5.5
  • Maximum Quiescent Current (mA)
    0.02
  • Propagation Delay Test Condition (pF)
    50
  • Minimum Operating Temperature (°C)
    -40
  • Maximum Operating Temperature (°C)
    85
  • Supplier Temperature Grade
    Commercial
  • Packaging
    Tape and Reel
  • Mounting
    Surface Mount
  • Package Height
    1.05(Max) mm
  • Package Width
    4.5(Max) mm
  • Package Length
    5.1(Max) mm
  • PCB changed
    16
  • Standard Package Name
    SO
  • Supplier Package
    TSSOP
  • Pin Count
    16
  • Lead Shape
    Gull-wing

Documentation et ressources

Fiches techniques
Ressources de conception