Altera5SGXEABN2F45C2GField Programmable Gate Arrays - FPGAs
FPGA Stratix® V GXFamily 952000Cells 0.85V 1932-Pin FBGA Tray
| Compliant | |
| 3A001a.7.a. | |
| NRND | |
| 8542.31.00.60 | |
| SVHC | Yes |
| Automotive | No |
| PPAP | No |
| Stratix® V GX | |
| 28nm | |
| 840 | |
| 1437000 | |
| 0.85 | |
| Utilize Memory | |
| 952000 | |
| 704 (18x18) | |
| SRAM | |
| 53248 | |
| 2640 | |
| 2 | |
| RapidIO to AXI Bridge Controller (RAB)|RLDRAM II Controller Core|SPAUI MAC|Sub-frame Latency JPEG 2000 Encoder (BA130)|Viterbi Compiler, Low-Speed/Hybrid Serial Decoder | |
| Altera/Barco Silex/Mobiveil, Inc/Commsonic | |
| 952000 | |
| 16 | |
| 28 | |
| 48 | |
| 14.1 | |
| 352 | |
| 4 | |
| Yes | |
| Yes | |
| No | |
| Yes | |
| 2 | |
| HCSL|LVDS|LVPECL | |
| LVCMOS|LVTTL | |
| QDRII+SRAM|RLDRAM III|RLDRAM II|DDR3 SDRAM|DDR2 SDRAM | |
| 0.82 | |
| 0.88 | |
| 3|2.5|1.8|1.5|1.35|1.25|1.2 | |
| 0 | |
| 85 | |
| Commercial | |
| Stratix | |
| Mounting | Surface Mount |
| Package Height | 3.13 |
| Package Width | 45 |
| Package Length | 45 |
| PCB changed | 1932 |
| Standard Package Name | BGA |
| Supplier Package | FBGA |
| 1932 | |
| Lead Shape | Ball |
| EDA / CAD Models |
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