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74AUP1G74DC125|NEXPERIA|limage
74AUP1G74DC125|NEXPERIA|simage
Flip Flops

74AUP1G74DC,125

Flip Flop D-Type Pos-Edge 1-Element 8-Pin VSSOP T/R

Nexperia
Datasheets 

Product Technical Specifications
  • EU RoHS
    Compliant
  • ECCN (US)
    EAR99
  • Part Status
    Active
  • HTS
    8542.39.00.70
  • Automotive
    Yes
  • PPAP
    Unknown
  • Logic Family
    AUP
  • Logic Function
    D-Type
  • Number of Channels per Chip
    1
  • Number of Elements per Chip
    1
  • Number of Element Inputs
    1
  • Number of Element Outputs
    1
  • Bus Hold
    No
  • Set/Reset
    Set/Reset
  • Polarity
    Inverting/Non-Inverting
  • Triggering Type
    Positive-Edge
  • Maximum Propagation Delay Time @ Maximum CL (ns)
    22.5@1.1V to 1.3V|12@1.4V to 1.6V|9.2@1.65V to 1.95V|6.6@2.3V to 2.7V|5.8@3V to 3.6V
  • Absolute Propagation Delay Time (ns)
    23.3
  • Process Technology
    0.35um
  • Input Signal Type
    Single-Ended
  • Maximum Low Level Output Current (mA)
    4
  • Maximum High Level Output Current (mA)
    -4
  • Minimum Operating Supply Voltage (V)
    0.8
  • Typical Operating Supply Voltage (V)
    1.8|2.5|3.3
  • Maximum Operating Supply Voltage (V)
    3.6
  • Maximum Quiescent Current (mA)
    0.0005
  • Propagation Delay Test Condition (pF)
    30
  • Minimum Operating Temperature (°C)
    -40
  • Maximum Operating Temperature (°C)
    125
  • Packaging
    Tape and Reel
  • Mounting
    Surface Mount
  • Package Height
    0.85(Max)
  • Package Width
    2.4(Max)
  • Package Length
    2.1(Max)
  • PCB changed
    8
  • Standard Package Name
    SO
  • Supplier Package
    VSSOP
  • Pin Count
    8

Documentation and Resources

Datasheets
Design resources