| Estatus de pieza | Active |
| Logic Family | HC |
| Logic Function | Bus Transceiver |
| Data Flow Direction | Bi-Directional |
| Number of Elements per Chip | 1 |
| Number of Channels per Chip | 5 |
| Number of Selection Inputs per Element | 0 |
| Number of Output Enables per Element | 1 Low |
| Number of Input Enables per Element | 0 |
| Number of Direction Control Inputs | 1 Low/High |
| Bus Hold | No |
| Polarity | Non-Inverting |
| Absolute Propagation Delay Time (ns) | 53 |
| Maximum Propagation Delay Time @ Maximum CL (ns) | 25@1.65V to 1.95V|15@2.3V to 2.7V|13@3V to 3.6V|11@4.5V to 5.5V |
| Propagation Delay Test Condition (pF) | 50 |
| Output Type | 3-State |
| Maximum Low Level Output Current (mA) | 24 |
| Maximum High Level Output Current (mA) | -24 |
| Typical Quiescent Current (uA) | 100 |
| Maximum Quiescent Current (uA) | 150 |
| Minimum Operating Supply Voltage (V) | 1.65 |
| Maximum Operating Supply Voltage (V) | 5.5 |
| Tolerant I/Os (V) | 5.5 Inputs |
| Minimum Operating Temperature (°C) | -55 |
| Maximum Operating Temperature (°C) | 125 |
| Supplier Temperature Grade | Extended |
