Logic Gates

SN74LS51D

AND-OR-Invert Gate 2-Element 2 Wide 2-IN/3-IN 14-Pin SOIC Tube

Texas Instruments

Product Technical Specifications

• 欧盟RoHS指令

  Compliant

• 美国出口管制分类ECCN编码

  EAR99

• 环保无铅

  Obsolete

• 美国海关商品代码

  SN74LS51D

• SVHC

  Yes

• Automotive

  No

• PPAP

  No

• Logic Family

  LS

• Logic Function

  AND-OR-Invert

• Number of Elements per Chip

  2

• Number of Element Inputs

  2 Wide 2-IN/3-IN

• Number of Output Enables per Element

  0

• Number of Selection Inputs per Element

  0

• Number of Element Outputs

  1

• Maximum Propagation Delay Time @ Maximum CL (ns)

  20@5V

• Absolute Propagation Delay Time (ns)

  20

• Output Type

  Push-Pull

• Maximum Low Level Output Current (mA)

  8

• Maximum High Level Output Current (mA)

  -0.4

• Minimum Operating Supply Voltage (V)

  4.75

• Typical Operating Supply Voltage (V)

  5

• Maximum Operating Supply Voltage (V)

  5.25

• Propagation Delay Test Condition (pF)

  15

• Minimum Operating Temperature (°C)

  0

• Maximum Operating Temperature (°C)

  70

• Packaging

  Tube

• Mounting

  Surface Mount

• Package Height

  1.5(Max)

• Package Width

  3.9

• Package Length

  8.65

• PCB changed

  14

• Standard Package Name

  SO

• Supplier Package

  SOIC

• Pin Count

  14

• Lead Shape

  Gull-wing