Flip Flops
MC100LVEL51DTR2G
Flip Flop D-Master-Slave Type Pos-Edge/Neg-Edge 1-Element 8-Pin TSSOP T/R
onsemiProduct Technical Specifications
EU RoHS
Compliant
ECCN (US)
EAR99
Part Status
Active
HTS
8542.39.00.90
Automotive
No
PPAP
No
Logic Family
ECL
Logic Function
D-Master-Slave Type
Number of Channels per Chip
1
Number of Elements per Chip
1
Number of Element Inputs
1
Number of Element Outputs
1
Bus Hold
No
Set/Reset
Reset
Polarity
Inverting/Non-Inverting
Triggering Type
Positive-Edge/Negative-Edge
Maximum Propagation Delay Time @ Maximum CL (ns)
0.52@3.3V
Absolute Propagation Delay Time (ns)
0.59
Input Signal Type
Single-Ended
Maximum Low Level Output Current (mA)
50
Maximum High Level Output Current (mA)
-50
Minimum Operating Supply Voltage (V)
3|-3
Typical Operating Supply Voltage (V)
3.3|-3.3
Maximum Operating Supply Voltage (V)
3.8|-3.8
Minimum Operating Temperature (°C)
-40
Maximum Operating Temperature (°C)
85
Packaging
Tape and Reel
Mounting
Surface Mount
Package Height
0.95(Max)
Package Width
3.1(Max)
Package Length
3.1(Max)
PCB changed
8
Standard Package Name
SO
Supplier Package
TSSOP
Pin Count
8
Lead Shape
Gull-wing

