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M4A5964810VNC|LATTICE|simage
M4A5964810VNC|LATTICE|limage
Complex Programmable Logic Devices - CPLDs

M4A5-96/48-10VNC

CPLD ispMACH 4AFamily 3.75KGates 96Macro Cells 83.3MHz/118MHz 5V 100-Pin TQFP Tray

Lattice Semiconductor
Datasheets 

Product Technical Specifications
  • EU RoHS
    Compliant
  • ECCN (US)
    EAR99
  • Part Status
    Obsolete
  • HTS
    8542.39.00.01
  • Automotive
    No
  • PPAP
    No
  • Family Name
    ispMACH 4A
  • Program Memory Type
    EEPROM
  • Number of Global Clocks
    4
  • Number of Macro Cells
    96
  • Product Terms
    20
  • Device System Gates
    3750
  • Data Gate
    No
  • Maximum Number of User I/Os
    48
  • Number of Flip Flops
    144
  • In-System Programmability
    Yes
  • Programmability
    Yes
  • Reprogrammability Support
    Yes
  • Maximum Internal Frequency (MHz)
    100|125
  • Maximum Internal Frequency (MHz)
    83.3|118
  • Maximum Clock to Output Delay (ns)
    11|6
  • Maximum Propagation Delay Time (ns)
    10
  • Speed Grade
    10
  • Individual Output Enable Control
    Yes
  • Minimum Operating Supply Voltage (V)
    4.75
  • Maximum Operating Supply Voltage (V)
    5.25
  • Typical Operating Supply Voltage (V)
    5
  • Tolerant Configuration Interface Voltage (V)
    5
  • Minimum Operating Temperature (°C)
    0
  • Maximum Operating Temperature (°C)
    70
  • Supplier Temperature Grade
    Commercial
  • Packaging
    Tray
  • Tradename
    ispMACH
  • Mounting
    Surface Mount
  • Package Height
    1.4 mm
  • Package Width
    14 mm
  • Package Length
    14 mm
  • PCB changed
    100
  • Standard Package Name
    QFP
  • Supplier Package
    TQFP
  • Pin Count
    100
  • Lead Shape
    Gull-wing

Documentation and Resources

Datasheets
Design resources