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M4A3323212VNI48|LATTICE|simage
M4A3323212VNI48|LATTICE|limage
Complex Programmable Logic Devices - CPLDs

M4A3-32/32-12VNI48

CPLD ispMACH 4AFamily 1.25KGates 32Macro Cells 66.7MHz/95MHz 3.3V 48-Pin TQFP Tray

Lattice Semiconductor
Datasheets 

Product Technical Specifications
  • EU RoHS
    Compliant
  • ECCN (US)
    EAR99
  • Part Status
    Obsolete
  • HTS
    8542.31.00.55
  • Automotive
    No
  • PPAP
    No
  • Family Name
    ispMACH 4A
  • Program Memory Type
    EEPROM
  • Number of Global Clocks
    4
  • Number of Macro Cells
    32
  • Product Terms
    20
  • Device System Gates
    1250
  • Data Gate
    No
  • Maximum Number of User I/Os
    32
  • Number of Flip Flops
    32
  • In-System Programmability
    Yes
  • Programmability
    Yes
  • Reprogrammability Support
    Yes
  • Maximum Internal Frequency (MHz)
    62.5|100
  • Maximum Internal Frequency (MHz)
    66.7|95
  • Maximum Clock to Output Delay (ns)
    13|6.5
  • Maximum Propagation Delay Time (ns)
    12
  • Speed Grade
    12
  • Individual Output Enable Control
    Yes
  • Minimum Operating Supply Voltage (V)
    3
  • Maximum Operating Supply Voltage (V)
    3.6
  • Typical Operating Supply Voltage (V)
    3.3
  • Tolerant Configuration Interface Voltage (V)
    5
  • Minimum Operating Temperature (°C)
    -40
  • Maximum Operating Temperature (°C)
    85
  • Supplier Temperature Grade
    Industrial
  • Packaging
    Tray
  • Tradename
    ispMACH
  • Mounting
    Surface Mount
  • Package Height
    1.4 mm
  • Package Width
    7 mm
  • Package Length
    7 mm
  • PCB changed
    48
  • Standard Package Name
    QFP
  • Supplier Package
    TQFP
  • Pin Count
    48
  • Lead Shape
    Gull-wing

Documentation and Resources

Datasheets
Design resources