Field Programmable Gate Arrays - FPGAs
LFXP2-5E-5TN144C
FPGA LatticeXP2Family 5000Cells 1.2V 144-Pin TQFP Tray
Lattice SemiconductorProduct Technical Specifications
EU RoHS
Compliant
ECCN (US)
EAR99
Part Status
Active
HTS
COMPONENTS
Automotive
No
PPAP
No
Family Name
LatticeXP2
Process Technology
90nm
User I/Os
100
Number of I/O Banks
8
Operating Supply Voltage (V)
1.2
Shift Registers
Utilize LUT
Logic Elements
5000
Number of Multipliers
12 (18x18)
Program Memory Type
SRAM
Embedded Memory (Kbit)
166
Total Number of Block RAM
9
Maximum Distributed RAM Bits
10240
Device Logic Units
5000
Number of Global Clocks
8
Device Number of DLLs/PLLs
2
JTAG Support
Yes
Dedicated DSP
3
Programmability
No
Reprogrammability Support
Yes
Number of Look-up Table Input
4
Copy Protection
No
In-System Programmability
No
Speed Grade
5
GMACs
3.9
Mega Multiply Accumulates per second
3900
Differential I/O Standards
LVCMOS
Maximum Differential I/O Pairs
39
Minimum Operating Supply Voltage (V)
1.14
Maximum Operating Supply Voltage (V)
1.26
I/O Voltage (V)
1.2|1.5|1.8|2.5|3.3
Minimum Operating Temperature (°C)
0
Maximum Operating Temperature (°C)
85
Supplier Temperature Grade
Commercial
Packaging
Tray
Tradename
LatticeXP
Mounting
Surface Mount
Package Height
1.4 mm
Package Width
20 mm
Package Length
20 mm
PCB changed
144
Standard Package Name
QFP
Supplier Package
TQFP
Pin Count
144
Lead Shape
Gull-wing

