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LCMXO3LF1300E5UWG36CTR|LATTICE|simage
LCMXO3LF1300E5UWG36CTR|LATTICE|limage
Field Programmable Gate Arrays - FPGAs

LCMXO3LF-1300E-5UWG36CTR

FPGA MACHXO3Family 1300Cells 1.2V 36-Pin WLCSP T/R

Lattice Semiconductor
Datasheets 

Product Technical Specifications
  • EU RoHS
    Compliant
  • ECCN (US)
    EAR99
  • Part Status
    Active
  • HTS
    8542.31.00.60
  • Automotive
    Yes
  • PPAP
    Unknown
  • Family Name
    MACHXO3
  • Process Technology
    65nm
  • User I/Os
    28
  • Number of I/O Banks
    4
  • Operating Supply Voltage (V)
    1.2
  • Logic Elements
    1300
  • Program Memory Type
    SRAM
  • Embedded Memory (Kbit)
    80
  • Total Number of Block RAM
    20
  • Device Logic Units
    1300
  • Device Number of DLLs/PLLs
    1
  • Programmability
    Yes
  • Reprogrammability Support
    Yes
  • Copy Protection
    No
  • In-System Programmability
    No
  • Speed Grade
    5
  • Minimum Operating Supply Voltage (V)
    1.14
  • Maximum Operating Supply Voltage (V)
    1.26
  • I/O Voltage (V)
    1.2|1.5|1.8|2.5|3.3
  • Minimum Operating Temperature (°C)
    0
  • Maximum Operating Temperature (°C)
    85
  • Supplier Temperature Grade
    Commercial
  • Packaging
    Tape and Reel
  • Mounting
    Surface Mount
  • Package Height
    0.35
  • Package Width
    2.49
  • Package Length
    2.54
  • PCB changed
    36
  • Standard Package Name
    CSP
  • Supplier Package
    WLCSP
  • Pin Count
    36

Documentation and Resources

Datasheets
Design resources