Field Programmable Gate Arrays - FPGAs
LCMXO2-640HC-6TG100I
FPGA MachXO2Family 640Cells 2.5V/3.3V 100-Pin TQFP Tray
Lattice SemiconductorProduct Technical Specifications
EU RoHS
Compliant
ECCN (US)
EAR99
Part Status
Active
HTS
8542.31.00.55
Automotive
No
PPAP
No
Family Name
MachXO2
Process Technology
65nm
User I/Os
78
Number of I/O Banks
4
Operating Supply Voltage (V)
3.3|2.5
Logic Elements
640
Program Memory Type
SRAM
Embedded Memory (Kbit)
18
Total Number of Block RAM
2
Maximum Distributed RAM Bits
5120
Device Logic Units
640
JTAG Support
Yes
Programmability
Yes
Reprogrammability Support
Yes
Copy Protection
No
In-System Programmability
Yes
Speed Grade
6
Differential I/O Standards
LVCMOS|LVTTL
Single-Ended I/O Standards
LVCMOS|LVTTL
Minimum Operating Supply Voltage (V)
2.375
Maximum Operating Supply Voltage (V)
3.6
I/O Voltage (V)
3.3|2.5|1.8|1.5|1.2
Minimum Operating Temperature (°C)
-40
Maximum Operating Temperature (°C)
100
Supplier Temperature Grade
Industrial
Packaging
Tray
Tradename
MachXO2
Mounting
Surface Mount
Package Height
1.4
Package Width
14
Package Length
14
PCB changed
100
Standard Package Name
QFP
Supplier Package
TQFP
Pin Count
100
Lead Shape
Gull-wing

