Field Programmable Gate Arrays - FPGAs
LCMXO2-256HC-4SG48I
FPGA MachXO2Family 256Cells 2.5V/3.3V 48-Pin QFN EP Tray
Lattice SemiconductorProduct Technical Specifications
EU RoHS
Compliant
ECCN (US)
EAR99
Part Status
Active
HTS
8473.30.51.00
Automotive
No
PPAP
No
Family Name
MachXO2
Process Technology
65nm
User I/Os
40
Number of I/O Banks
4
Operating Supply Voltage (V)
2.5|3.3
Shift Registers
Utilize Memory
Logic Elements
256
Program Memory Type
SRAM
Maximum Distributed RAM Bits
2048
Device Logic Units
256
Reprogrammability Support
No
In-System Programmability
No
Speed Grade
4
Maximum Differential I/O Pairs
20
Minimum Operating Supply Voltage (V)
2.375
Maximum Operating Supply Voltage (V)
3.6
I/O Voltage (V)
1.2|1.5|1.8|2.5|3.3
Minimum Operating Temperature (°C)
-40
Maximum Operating Temperature (°C)
100
Supplier Temperature Grade
Industrial
Packaging
Tray
Mounting
Surface Mount
Package Height
0.88 mm
Package Width
7 mm
Package Length
7 mm
PCB changed
48
Standard Package Name
QFN
Supplier Package
QFN EP
Pin Count
48
Lead Shape
No Lead

