Field Programmable Gate Arrays - FPGAs

LCMXO2-256HC-4SG32I

FPGA MachXO2Family 256Cells 2.5V/3.3V 32-Pin QFN EP Tray

Lattice Semiconductor

Product Technical Specifications

• EU RoHS

  Compliant

• ECCN (US)

  EAR99

• Part Status

  Active

• HTS

  COMPONENTS

• Automotive

  No

• PPAP

  No

• Family Name

  MachXO2

• Process Technology

  65nm

• User I/Os

  21

• Number of I/O Banks

  4

• Operating Supply Voltage (V)

  2.5|3.3

• Shift Registers

  Utilize Memory

• Logic Elements

  256

• Program Memory Type

  SRAM

• Maximum Distributed RAM Bits

  2048

• Device Logic Units

  256

• Reprogrammability Support

  No

• In-System Programmability

  No

• Speed Grade

  4

• Maximum Differential I/O Pairs

  10

• Minimum Operating Supply Voltage (V)

  2.375

• Maximum Operating Supply Voltage (V)

  3.6

• I/O Voltage (V)

  1.2|1.5|1.8|2.5|3.3

• Minimum Operating Temperature (°C)

  -40

• Maximum Operating Temperature (°C)

  100

• Supplier Temperature Grade

  Industrial

• Packaging

  Tray

• Mounting

  Surface Mount

• Package Height

  0.53 mm

• Package Width

  5 mm

• Package Length

  5 mm

• PCB changed

  32

• Standard Package Name

  QFN

• Supplier Package

  QFN EP

• Pin Count

  32

• Lead Shape

  No Lead