Complex Programmable Logic Devices - CPLDs

LC4256V-10TN100I

CPLD ispMACH® 4000VFamily 256Macro Cells 125MHz 3.3V 100-Pin TQFP Tray

Lattice Semiconductor

Product Technical Specifications

• EU RoHS

  Compliant

• ECCN (US)

  EAR99

• Part Status

  Active

• HTS

  8542.31.00.55

• Automotive

  No

• PPAP

  No

• Family Name

  ispMACH® 4000V

• Program Memory Type

  EEPROM

• Number of Logic Blocks/Elements

  16

• Number of Global Clocks

  4

• Number of I/O Banks

  2

• Number of Macro Cells

  256

• Product Terms

  80

• Data Gate

  No

• Maximum Number of User I/Os

  64

• In-System Programmability

  Yes

• Programmability

  Yes

• Reprogrammability Support

  Yes

• Maximum Internal Frequency (MHz)

  125

• Maximum Internal Frequency (MHz)

  125

• Maximum Clock to Output Delay (ns)

  6

• Maximum Propagation Delay Time (ns)

  10

• Speed Grade

  10

• Individual Output Enable Control

  Yes

• Minimum Operating Supply Voltage (V)

  3

• Maximum Operating Supply Voltage (V)

  3.6

• Typical Operating Supply Voltage (V)

  3.3

• Tolerant Configuration Interface Voltage (V)

  5

• Maximum Supply Current (mA)

  12.5(Typ)

• Minimum Operating Temperature (°C)

  -40

• Maximum Operating Temperature (°C)

  105

• Supplier Temperature Grade

  Industrial

• Packaging

  Tray

• Tradename

  ispMACH

• Mounting

  Surface Mount

• Package Height

  1.4

• Package Width

  14

• Package Length

  14

• PCB changed

  100

• Standard Package Name

  QFP

• Supplier Package

  TQFP

• Pin Count

  100

• Lead Shape

  Gull-wing