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Complex Programmable Logic Devices - CPLDs

LC4032V-25TN48C

CPLD ispMACH® 4000VFamily 32Macro Cells 125MHz 3.3V 48-Pin TQFP Tray

Lattice Semiconductor

Product Technical Specifications

• EU RoHS

  Compliant

• ECCN (US)

  EAR99

• Part Status

  Active

• HTS

  8542.31.00.55

• Automotive

  No

• PPAP

  No

• Family Name

  ispMACH® 4000V

• Program Memory Type

  ROMLess

• Number of Logic Blocks/Elements

  2

• Number of Global Clocks

  4

• Number of I/O Banks

  2

• Number of Macro Cells

  32

• Product Terms

  80

• Data Gate

  No

• Maximum Number of User I/Os

  32

• In-System Programmability

  Yes

• Programmability

  Yes

• Reprogrammability Support

  Yes

• Maximum Internal Frequency (MHz)

  400

• Maximum Internal Frequency (MHz)

  125

• Maximum Clock to Output Delay (ns)

  6

• Maximum Propagation Delay Time (ns)

  2.5

• Speed Grade

  25

• Individual Output Enable Control

  Yes

• Minimum Operating Supply Voltage (V)

  3

• Maximum Operating Supply Voltage (V)

  3.6

• Typical Operating Supply Voltage (V)

  3.3

• Tolerant Configuration Interface Voltage (V)

  5

• Maximum Supply Current (mA)

  11.8(Typ)

• Minimum Operating Temperature (°C)

  0

• Maximum Operating Temperature (°C)

  90

• Supplier Temperature Grade

  Commercial

• Packaging

  Tray

• Tradename

  ispMACH

• Mounting

  Surface Mount

• Package Height

  1

• Package Width

  7

• Package Length

  7

• PCB changed

  48

• Standard Package Name

  QFP

• Supplier Package

  TQFP

• Pin Count

  48

• Lead Shape

  Gull-wing