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ISPLSI2032E110LTN44|LATTICE|simage
ISPLSI2032E110LTN44|LATTICE|limage
Complex Programmable Logic Devices - CPLDs

ISPLSI 2032E-110LTN44

CPLD ispLSI® 2000EFamily 1KGates 32Macro Cells 111MHz 5V 44-Pin TQFP

Lattice Semiconductor
Datasheets 

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Product Technical Specifications
  • EU RoHS
    Compliant
  • ECCN (US)
    EAR99
  • Part Status
    Obsolete
  • HTS
    COMPONENTS
  • Automotive
    No
  • PPAP
    No
  • Family Name
    ispLSI® 2000E
  • Program Memory Type
    ROMLess
  • Number of Logic Blocks/Elements
    8
  • Number of Global Clocks
    3
  • Number of Macro Cells
    32
  • Device System Gates
    1000
  • Data Gate
    No
  • Maximum Number of User I/Os
    32
  • Number of Flip Flops
    32
  • In-System Programmability
    Yes
  • Programmability
    Yes
  • Reprogrammability Support
    Yes
  • Maximum Internal Frequency (MHz)
    125
  • Maximum Internal Frequency (MHz)
    111
  • Maximum Clock to Output Delay (ns)
    6.5
  • Maximum Propagation Delay Time (ns)
    10
  • Speed Grade
    110
  • Individual Output Enable Control
    No
  • Minimum Operating Supply Voltage (V)
    4.75
  • Maximum Operating Supply Voltage (V)
    5.25
  • Typical Operating Supply Voltage (V)
    5
  • I/O Voltage (V)
    3.3, 5
  • Maximum Supply Current (mA)
    65(Typ)
  • Minimum Operating Temperature (°C)
    0
  • Maximum Operating Temperature (°C)
    70
  • Supplier Temperature Grade
    Commercial
  • Tradename
    ispLSI
  • Mounting
    Surface Mount
  • Package Height
    1
  • Package Width
    10
  • Package Length
    10
  • PCB changed
    44
  • Standard Package Name
    QFP
  • Supplier Package
    TQFP
  • Pin Count
    44
  • Lead Shape
    Gull-wing
Order Quantity

Documentation and Resources

Datasheets
Design resources