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IS65C1024AL45QLA3TR|ISSI|simage
IS65C1024AL45QLA3TR|ISSI|limage
SRAM Chip

IS65C1024AL-45QLA3-TR

SRAM Chip Async Single 5V 1M-bit 128K x 8 45ns 32-Pin SOP T/R Automotive AEC-Q100

Integrated Silicon Solution Inc
Datasheets 

Product Technical Specifications
  • EU RoHS
    Compliant
  • ECCN (US)
    EAR99
  • Part Status
    Active
  • HTS
    8542.32.00.41
  • Automotive
    Yes
  • PPAP
    Yes
  • Chip Density (bit)
    1M
  • Number of Words
    128K
  • Number of Bits/Word (bit)
    8
  • Data Rate Architecture
    SDR
  • Address Bus Width (bit)
    17
  • Number of Ports
    1
  • Timing Type
    Asynchronous
  • Max. Access Time (ns)
    45
  • Minimum Operating Supply Voltage (V)
    4.5
  • Typical Operating Supply Voltage (V)
    5
  • Maximum Operating Supply Voltage (V)
    5.5
  • Operating Current (mA)
    35
  • Minimum Operating Temperature (°C)
    -40
  • Maximum Operating Temperature (°C)
    125
  • Supplier Temperature Grade
    Automotive
  • Packaging
    Tape and Reel
  • Mounting
    Surface Mount
  • Package Height
    3(Max) - 0.1(Min)
  • Package Width
    11.43(Max)
  • Package Length
    20.75(Max)
  • PCB changed
    32
  • Standard Package Name
    SO
  • Supplier Package
    SOP
  • Pin Count
    32
  • Lead Shape
    Gull-wing

Documentation and Resources

Datasheets
Design resources