Field Programmable Gate Arrays - FPGAs

ICE40LP384-SG32TR1K

FPGA iCE40 LPFamily 384Cells 1.2V 32-Pin QFN EP T/R

Lattice Semiconductor

Product Technical Specifications

• EU RoHS

  Compliant

• ECCN (US)

  EAR99

• Part Status

  Active

• HTS

  8542.31.00.60

• Automotive

  No

• PPAP

  No

• Family Name

  iCE40 LP

• Process Technology

  40nm

• User I/Os

  21

• Number of I/O Banks

  4

• Operating Supply Voltage (V)

  1.2

• Logic Elements

  384

• Program Memory Type

  SRAM

• Device Logic Units

  384

• Number of Global Clocks

  8

• Programmability

  Yes

• Reprogrammability Support

  Yes

• Copy Protection

  No

• In-System Programmability

  No

• Maximum Differential I/O Pairs

  8

• Minimum Operating Supply Voltage (V)

  1.14

• Maximum Operating Supply Voltage (V)

  1.26

• I/O Voltage (V)

  1.2|1.5|1.8|2.5|3.3

• Minimum Operating Temperature (°C)

  -40

• Maximum Operating Temperature (°C)

  100

• Packaging

  Tape and Reel

• Tradename

  iCE40

• Mounting

  Surface Mount

• Package Height

  0.53 mm

• Package Width

  5 mm

• Package Length

  5 mm

• PCB changed

  32

• Standard Package Name

  QFN

• Supplier Package

  QFN EP

• Pin Count

  32

• Lead Shape

  No Lead