Field Programmable Gate Arrays - FPGAs
ICE40LP1K-CB81TR1K
FPGA iCE40 LPFamily 1280Cells 1.2V 81-Pin T/R
Lattice SemiconductorProduct Technical Specifications
EU RoHS
Compliant
ECCN (US)
EAR99
Part Status
Active
HTS
8542.31.00.60
Automotive
No
PPAP
No
Family Name
iCE40 LP
Process Technology
40nm
User I/Os
62
Number of I/O Banks
4
Operating Supply Voltage (V)
1.2
Logic Elements
1280
Program Memory Type
SRAM
Embedded Memory (Kbit)
64
Total Number of Block RAM
16
Device Logic Units
1280
Number of Global Clocks
8
Device Number of DLLs/PLLs
1
Programmability
Yes
Reprogrammability Support
Yes
Copy Protection
No
In-System Programmability
No
Maximum Differential I/O Pairs
12
Minimum Operating Supply Voltage (V)
1.14
Maximum Operating Supply Voltage (V)
1.26
I/O Voltage (V)
1.2|1.5|1.8|2.5|3.3
Minimum Operating Temperature (°C)
-40
Maximum Operating Temperature (°C)
100
Packaging
Tape and Reel
Tradename
iCE40
Pin Count
81

