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GAL22V10D7LJ|LATTICE|simage
GAL22V10D7LJ|LATTICE|limage
Complex Programmable Logic Devices - CPLDs

GAL22V10D-7LJ

CPLD 10Macro Cells 166MHz 5V 28-Pin PLCC

Lattice Semiconductor
Datasheets 

Product Technical Specifications
  • EU RoHS
    Not Compliant
  • ECCN (US)
    EAR99
  • Part Status
    Obsolete
  • HTS
    COMPONENTS
  • SVHC
    Yes
  • SVHC Exceeds Threshold
    Yes
  • Automotive
    No
  • PPAP
    No
  • Program Memory Type
    ROMLess
  • Number of Logic Blocks/Elements
    10
  • Number of Macro Cells
    10
  • Product Terms
    10
  • Data Gate
    No
  • Maximum Number of User I/Os
    10
  • In-System Programmability
    Yes
  • Programmability
    Yes
  • Reprogrammability Support
    Yes
  • Programmable Type
    EPLD
  • Maximum Internal Frequency (MHz)
    133(Min)
  • Maximum Internal Frequency (MHz)
    166(Min)
  • Maximum Clock to Output Delay (ns)
    4.5
  • Maximum Propagation Delay Time (ns)
    4
  • Speed Grade
    7
  • Individual Output Enable Control
    Yes
  • Minimum Operating Supply Voltage (V)
    4.75
  • Maximum Operating Supply Voltage (V)
    5.25
  • Typical Operating Supply Voltage (V)
    5
  • Maximum Supply Current (mA)
    160
  • Minimum Operating Temperature (°C)
    0
  • Maximum Operating Temperature (°C)
    70
  • Supplier Temperature Grade
    Commercial
  • Mounting
    Surface Mount
  • Package Height
    3.68(Min)
  • Package Width
    11.5
  • Package Length
    11.5
  • PCB changed
    28
  • Standard Package Name
    LCC
  • Supplier Package
    PLCC
  • Pin Count
    28
  • Lead Shape
    J-Lead

Documentation and Resources

Datasheets
Design resources