Complex Programmable Logic Devices - CPLDs

EPM7256AETC100-10

CPLD MAX® 7000AFamily 5KGates 256Macro Cells 95.2MHz 3.3V 100-Pin TQFP Tray

Altera

Product Technical Specifications

• EU RoHS

  Not Compliant

• ECCN (US)

  EAR99

• Part Status

  Obsolete

• HTS

  COMPONENTS

• SVHC

  Yes

• SVHC Exceeds Threshold

  Yes

• Automotive

  No

• PPAP

  No

• Family Name

  MAX® 7000A

• Program Memory Type

  EEPROM

• Number of Logic Blocks/Elements

  16

• Number of Global Clocks

  2

• Number of Macro Cells

  256

• Product Terms

  32

• Device System Gates

  5000

• Data Gate

  No

• Maximum Number of User I/Os

  84

• In-System Programmability

  Yes

• Programmability

  Yes

• Reprogrammability Support

  Yes

• Maximum Internal Frequency (MHz)

  125

• Maximum Internal Frequency (MHz)

  95.2

• Maximum Clock to Output Delay (ns)

  6.4

• Maximum Propagation Delay Time (ns)

  10

• Speed Grade

  10

• Individual Output Enable Control

  No

• Minimum Operating Supply Voltage (V)

  3

• Maximum Operating Supply Voltage (V)

  3.6

• Typical Operating Supply Voltage (V)

  3.3

• I/O Voltage (V)

  3.3|5

• Tolerant Configuration Interface Voltage (V)

  2.5|3.3|5

• Minimum Operating Temperature (°C)

  0

• Maximum Operating Temperature (°C)

  70

• Supplier Temperature Grade

  Commercial

• Packaging

  Tray

• Tradename

  MAX

• Mounting

  Surface Mount

• Package Height

  1

• Package Width

  14

• Package Length

  14

• PCB changed

  100

• Standard Package Name

  QFP

• Supplier Package

  TQFP

• Pin Count

  100

• Lead Shape

  Gull-wing