Complex Programmable Logic Devices - CPLDs

EPM7192EGI160-20

CPLD MAX® 7000Family 3.75KGates 192Macro Cells 62.5MHz 5V 160-Pin CPGA Tray

Altera

Product Technical Specifications

• EU RoHS

  Not Compliant

• ECCN (US)

  EAR99

• Part Status

  Obsolete

• HTS

  COMPONENTS

• Automotive

  No

• PPAP

  No

• Family Name

  MAX® 7000

• Program Memory Type

  EEPROM

• Number of Logic Blocks/Elements

  12

• Number of Global Clocks

  2

• Number of Macro Cells

  192

• Product Terms

  32

• Device System Gates

  3750

• Data Gate

  No

• Maximum Number of User I/Os

  124

• In-System Programmability

  Yes

• Programmability

  Yes

• Reprogrammability Support

  Yes

• Maximum Internal Frequency (MHz)

  83.33

• Maximum Internal Frequency (MHz)

  62.5

• Maximum Clock to Output Delay (ns)

  12

• Maximum Propagation Delay Time (ns)

  20

• Speed Grade

  20

• Individual Output Enable Control

  Yes

• Minimum Operating Supply Voltage (V)

  4.5

• Maximum Operating Supply Voltage (V)

  5.5

• Typical Operating Supply Voltage (V)

  5

• I/O Voltage (V)

  3.3|5

• Minimum Operating Temperature (°C)

  -40

• Maximum Operating Temperature (°C)

  85

• Supplier Temperature Grade

  Industrial

• Packaging

  Tray

• Tradename

  MAX

• Mounting

  Through Hole

• Package Height

  3.56

• Package Width

  39.62

• Package Length

  39.62

• PCB changed

  160

• Standard Package Name

  PGA

• Supplier Package

  CPGA

• Pin Count

  160

• Lead Shape

  Through Hole