Complex Programmable Logic Devices - CPLDs

EPM7128SQC160-15N

CPLD MAX® 7000Family 2.5KGates 128Macro Cells 76.9MHz 3.3V 160-Pin PQFP Tray

Altera

Product Technical Specifications

• EU RoHS

  Compliant

• ECCN (US)

  EAR99

• Part Status

  Obsolete

• HTS

  COMPONENTS

• SVHC

  Yes

• Automotive

  No

• PPAP

  No

• Family Name

  MAX® 7000

• Program Memory Type

  EEPROM

• Number of Logic Blocks/Elements

  8

• Number of Global Clocks

  2

• Number of Macro Cells

  128

• Process Technology

  0.5um

• Product Terms

  32

• Device System Gates

  2500

• Data Gate

  No

• Maximum Number of User I/Os

  100

• In-System Programmability

  Yes

• Programmability

  Yes

• Reprogrammability Support

  Yes

• Maximum Internal Frequency (MHz)

  100

• Maximum Internal Frequency (MHz)

  76.9

• Maximum Clock to Output Delay (ns)

  8

• Maximum Propagation Delay Time (ns)

  15

• Speed Grade

  15

• Individual Output Enable Control

  No

• Minimum Operating Supply Voltage (V)

  4.75

• Maximum Operating Supply Voltage (V)

  5.25

• Typical Operating Supply Voltage (V)

  3.3

• I/O Voltage (V)

  3.3|5

• Tolerant Configuration Interface Voltage (V)

  2.5|3.3|5

• Minimum Operating Temperature (°C)

  0

• Maximum Operating Temperature (°C)

  70

• Supplier Temperature Grade

  Commercial

• Packaging

  Tray

• Tradename

  MAX

• Mounting

  Surface Mount

• Package Height

  3.4

• Package Width

  28

• Package Length

  28

• PCB changed

  160

• Standard Package Name

  QFP

• Supplier Package

  PQFP

• Pin Count

  160

• Lead Shape

  Gull-wing