Complex Programmable Logic Devices - CPLDs

EPM7064SLC44-5

CPLD MAX® 7000SFamily 1.25KGates 64Macro Cells 175.4MHz 5V 44-Pin PLCC Tray

Altera

Product Technical Specifications

• EU RoHS

  Not Compliant

• ECCN (US)

  EAR99

• Part Status

  Obsolete

• HTS

  COMPONENTS

• Automotive

  No

• PPAP

  No

• Family Name

  MAX® 7000S

• Program Memory Type

  EEPROM

• Number of Logic Blocks/Elements

  4

• Number of Global Clocks

  2

• Number of Macro Cells

  64

• Process Technology

  0.5um

• Product Terms

  32

• Device System Gates

  1250

• Data Gate

  No

• Maximum Number of User I/Os

  36

• In-System Programmability

  Yes

• Programmability

  Yes

• Reprogrammability Support

  Yes

• Maximum Internal Frequency (MHz)

  250

• Maximum Internal Frequency (MHz)

  175.4

• Maximum Clock to Output Delay (ns)

  3.2

• Maximum Propagation Delay Time (ns)

  5

• Speed Grade

  5

• Individual Output Enable Control

  Yes

• Minimum Operating Supply Voltage (V)

  4.75

• Maximum Operating Supply Voltage (V)

  5.25

• Typical Operating Supply Voltage (V)

  5

• I/O Voltage (V)

  3.3|5

• Minimum Operating Temperature (°C)

  0

• Maximum Operating Temperature (°C)

  70

• Supplier Temperature Grade

  Commercial

• Packaging

  Tray

• Tradename

  MAX

• Mounting

  Surface Mount

• Package Height

  3.81

• Package Width

  16.59

• Package Length

  16.59

• PCB changed

  44

• Standard Package Name

  LCC

• Supplier Package

  PLCC

• Pin Count

  44

• Lead Shape

  J-Lead