Complex Programmable Logic Devices - CPLDs

EPM7064BTC100-5N

CPLD MAX® 7000BFamily 1.25KGates 64Macro Cells 212.8MHz 2.5V 100-Pin TQFP Tray

Altera

Product Technical Specifications

• EU RoHS

  Compliant

• ECCN (US)

  EAR99

• Part Status

  Obsolete

• HTS

  8542.31.00.55

• Automotive

  No

• PPAP

  No

• Family Name

  MAX® 7000B

• Program Memory Type

  EEPROM

• Number of Logic Blocks/Elements

  4

• Number of Global Clocks

  2

• Number of I/O Banks

  2

• Number of Macro Cells

  64

• Product Terms

  32

• Device System Gates

  1250

• Data Gate

  No

• Maximum Number of User I/Os

  68

• In-System Programmability

  Yes

• Programmability

  Yes

• Reprogrammability Support

  Yes

• Maximum Internal Frequency (MHz)

  250

• Maximum Internal Frequency (MHz)

  212.8

• Maximum Clock to Output Delay (ns)

  3.4

• Maximum Propagation Delay Time (ns)

  5

• Speed Grade

  5

• Individual Output Enable Control

  Yes

• Minimum Operating Supply Voltage (V)

  2.375

• Maximum Operating Supply Voltage (V)

  2.625

• Typical Operating Supply Voltage (V)

  2.5

• I/O Voltage (V)

  3.3|2.5|1.8

• Tolerant Configuration Interface Voltage (V)

  3.3|2.5|1.8

• Minimum Operating Temperature (°C)

  0

• Maximum Operating Temperature (°C)

  70

• Supplier Temperature Grade

  Commercial

• Packaging

  Tray

• Tradename

  MAX

• Mounting

  Surface Mount

• Package Height

  1

• Package Width

  14

• Package Length

  14

• PCB changed

  100

• Standard Package Name

  QFP

• Supplier Package

  TQFP

• Pin Count

  100

• Lead Shape

  Gull-wing