Complex Programmable Logic Devices - CPLDs
EPM240F100C5N
CPLD MAX® IIFamily 192Macro Cells 201.1MHz 2.5V/3.3V 100-Pin FBGA Tray
AlteraProduct Technical Specifications
EU RoHS
Compliant
ECCN (US)
EAR99
Part Status
NRND
HTS
COMPONENTS
Automotive
No
PPAP
No
Family Name
MAX® II
Logic Elements
240
Program Memory Type
Flash
Memory Size (Kbit)
8
Number of Logic Blocks/Elements
24
Number of Global Clocks
4
Number of I/O Banks
2
Number of Macro Cells
192
Process Technology
0.18um
Data Gate
No
Maximum Number of User I/Os
80
In-System Programmability
Yes
Number of Inter Dielectric Layers
6
Programmability
Yes
Reprogrammability Support
No
Programmable Type
In System Programmable
Maximum Internal Frequency (MHz)
201.1
Maximum Clock to Output Delay (ns)
6.9
Maximum Propagation Delay Time (ns)
7.5|5.9
Speed Grade
5
Individual Output Enable Control
Yes
Minimum Operating Supply Voltage (V)
2.375
Maximum Operating Supply Voltage (V)
3.6
Typical Operating Supply Voltage (V)
2.5|3.3
I/O Voltage (V)
1.5|1.8|2.5|3.3
Tolerant Configuration Interface Voltage (V)
1.8|2.5|3.3|5
Minimum Operating Temperature (°C)
0
Maximum Operating Temperature (°C)
85
Supplier Temperature Grade
Commercial
Packaging
Tray
Tradename
MAX
Mounting
Surface Mount
Package Height
1
Package Width
11
Package Length
11
PCB changed
100
Standard Package Name
BGA
Supplier Package
FBGA
Pin Count
100
Lead Shape
Ball

