Complex Programmable Logic Devices - CPLDs
EPM1270GF256C3N
CPLD MAX® IIFamily 980Macro Cells 304MHz 1.8V 256-Pin FBGA Tray
AlteraProduct Technical Specifications
EU RoHS
Compliant
ECCN (US)
3A991d.
Part Status
NRND
HTS
8542.31.00.55
Automotive
No
PPAP
No
Family Name
MAX® II
Logic Elements
1270
Program Memory Type
Flash
Memory Size (Kbit)
8
Number of Logic Blocks/Elements
127
Number of Global Clocks
4
Number of I/O Banks
4
Number of Macro Cells
980
Process Technology
0.18um
Data Gate
No
Maximum Number of User I/Os
212
In-System Programmability
Yes
Number of Inter Dielectric Layers
6
Programmability
Yes
Reprogrammability Support
No
Maximum Internal Frequency (MHz)
3012.05
Maximum Internal Frequency (MHz)
304
Maximum Clock to Output Delay (ns)
4.6
Maximum Propagation Delay Time (ns)
6.2|3.7
Speed Grade
3
Individual Output Enable Control
Yes
Minimum Operating Supply Voltage (V)
1.71
Maximum Operating Supply Voltage (V)
1.89
Typical Operating Supply Voltage (V)
1.8
I/O Voltage (V)
1.5|1.8|2.5|3.3
Tolerant Configuration Interface Voltage (V)
1.8|2.5|3.3|5
Minimum Operating Temperature (°C)
0
Maximum Operating Temperature (°C)
85
Supplier Temperature Grade
Commercial
Packaging
Tray
Tradename
MAX
Mounting
Surface Mount
Package Height
1.25
Package Width
17
Package Length
17
PCB changed
256
Standard Package Name
BGA
Supplier Package
FBGA
Pin Count
256
Lead Shape
Ball

