Field Programmable Gate Arrays - FPGAs

EP3SL340H1152I3

FPGA Stratix® III LFamily 337500Cells 500MHz 1.1V 1152-Pin FC-HFBGA Tray

Altera

Product Technical Specifications

• EU RoHS

  Not Compliant

• ECCN (US)

  3A001a.7.a.

• Part Status

  Obsolete

• HTS

  8542.31.00.60

• Automotive

  No

• PPAP

  No

• Family Name

  Stratix® III L

• Process Technology

  65nm

• User I/Os

  744

• Number of I/O Banks

  24

• Operating Supply Voltage (V)

  1.1

• Shift Registers

  Utilize Memory

• Logic Elements

  337500

• Number of Multipliers

  576 (18x18)

• Program Memory Type

  SRAM

• Embedded Memory (Kbit)

  18381

• Total Number of Block RAM Memories

  48+1040+6750

• IP Core

  EtherNET/IP|DS1/E1 TDM over Packet IP core|Sub-frame Latency JPEG 2000 Encoder (BA130)|RapidIO to AXI Bridge Controller (RAB)|EtherCAT

• Provider Name

  Barco Silex/Mobiveil, Inc

• Device Logic Units

  337500

• Number of Global Clocks

  16

• Device Number of DLLs/PLLs

  12

• Programmability

  No

• Reprogrammability Support

  No

• Copy Protection

  Yes

• Opr. Frequency (MHz)

  500

• In-System Programmability

  No

• Speed Grade

  3

• Differential I/O Standards

  LVPECL|LVDS

• Single-Ended I/O Standards

  LVTTL|LVCMOS

• External Memory Interface

  DDR2 SDRAM|DDR3 SDRAM|RLDRAM II|QDRII+SRAM

• Minimum Operating Supply Voltage (V)

  1.05

• Maximum Operating Supply Voltage (V)

  1.15

• I/O Voltage (V)

  1.2|1.5|1.8|2.5|3.3

• Minimum Operating Temperature (°C)

  -40

• Maximum Operating Temperature (°C)

  100

• Supplier Temperature Grade

  Industrial

• Packaging

  Tray

• Tradename

  Stratix

• Mounting

  Surface Mount

• Package Height

  3

• Package Width

  40

• Package Length

  40

• PCB changed

  1152

• Standard Package Name

  BGA

• Supplier Package

  FC-HFBGA

• Pin Count

  1152

• Lead Shape

  Ball