Field Programmable Gate Arrays - FPGAs

EP20K200EQI240-2N

FPGA APEX 20KFamily 200KGates 8320Cells 205MHz 1.8V 240-Pin PQFP Tray

Altera

Product Technical Specifications

• EU RoHS

  Compliant

• ECCN (US)

  EAR99

• Part Status

  Obsolete

• HTS

  COMPONENTS

• SVHC

  Yes

• Automotive

  No

• PPAP

  No

• Family Name

  APEX 20K

• Process Technology

  0.18um

• User I/Os

  168

• Number of I/O Banks

  8

• Operating Supply Voltage (V)

  1.8

• Logic Elements

  8320

• Device System Gates

  526000

• Program Memory Type

  SRAM

• Embedded Memory (Kbit)

  104

• Total Number of Block RAM Memories

  52

• Device Logic Gates

  200000

• Device Logic Units

  8320

• Number of Global Clocks

  8

• Device Number of DLLs/PLLs

  2

• Programmability

  No

• Reprogrammability Support

  No

• Copy Protection

  No

• Opr. Frequency (MHz)

  205

• In-System Programmability

  No

• Speed Grade

  2

• Differential I/O Standards

  LVPECL|LVDS|PCI-X|AGP|CTT

• Single-Ended I/O Standards

  LVCMOS|LVTTL

• Maximum I/O Performance

  840Mbps

• External Memory Interface

  DDR SDRAM|ZBT SRAM

• Minimum Operating Supply Voltage (V)

  1.71

• Maximum Operating Supply Voltage (V)

  1.89

• I/O Voltage (V)

  1.8|2.5|3.3

• Minimum Operating Temperature (°C)

  -40

• Maximum Operating Temperature (°C)

  100

• Supplier Temperature Grade

  Industrial

• Packaging

  Tray

• Tradename

  APEX

• Mounting

  Surface Mount

• Package Height

  3.4

• Package Width

  32

• Package Length

  32

• PCB changed

  240

• Standard Package Name

  QFP

• Supplier Package

  PQFP

• Pin Count

  240

• Lead Shape

  Gull-wing