Field Programmable Gate Arrays - FPGAs

EP1S20F672C7N

FPGA Stratix®Family 18460Cells 420.17MHz 1.5V 672-Pin FBGA Tray

Altera

Product Technical Specifications

• EU RoHS

  Compliant

• ECCN (US)

  3A991d.

• Part Status

  Obsolete

• HTS

  COMPONENTS

• Automotive

  No

• PPAP

  No

• Family Name

  Stratix®

• Process Technology

  130nm

• User I/Os

  426

• Number of I/O Banks

  8

• Operating Supply Voltage (V)

  1.5

• Shift Registers

  Utilize Memory

• Logic Elements

  18460

• Number of Multipliers

  80 (9x9)

• Program Memory Type

  SRAM

• Embedded Memory (Kbit)

  1630.1

• Total Number of Block RAM

  2+82+194

• IP Core

  Video LVDS SerDes Transmitter / Receiver|PCI Express Cores|IFI Advanced CAN IP|DI2CSB I2C Bus Interface-Slave|32/64-bit PCI-X bus Master/Target interface Core, 66/100/133Mhz

• Provider Name

  Microtronix Inc/CAST, Inc/Northwest Logic, Inc/IFI/Digital Core Design/PLDA

• SERDES Channels

  30

• Device Logic Units

  18460

• Number of Global Clocks

  16

• Device Number of DLLs/PLLs

  6

• Dedicated DSP

  10

• Programmability

  No

• Reprogrammability Support

  No

• Copy Protection

  Yes

• Opr. Frequency (MHz)

  420.17

• In-System Programmability

  Yes

• Speed Grade

  7

• Differential I/O Standards

  LVPECL|LVDS|PCML

• Single-Ended I/O Standards

  LVTTL|LVCMOS

• Maximum I/O Performance

  840Mbps

• External Memory Interface

  DDR SDRAM|FCRAM|QDR II+SRAM|ZBT SRAM

• Minimum Operating Supply Voltage (V)

  1.425

• Maximum Operating Supply Voltage (V)

  1.575

• I/O Voltage (V)

  1.5|1.8|2.5|3.3

• Minimum Operating Temperature (°C)

  0

• Maximum Operating Temperature (°C)

  85

• Supplier Temperature Grade

  Commercial

• Packaging

  Tray

• Tradename

  Stratix

• Mounting

  Surface Mount

• Package Height

  2.2(Max)

• Package Width

  27

• Package Length

  27

• PCB changed

  672

• Standard Package Name

  BGA

• Supplier Package

  FBGA

• Pin Count

  672

• Lead Shape

  Ball