SRAM Chip

CY7C1361C-100AXET

SRAM Chip Sync Quad 3.3V 9M-bit 256K x 36 8.5ns 100-Pin TQFP T/R Automotive AEC-Q100

Infineon Technologies AG

Product Technical Specifications

• EU RoHS

  Compliant

• ECCN (US)

  3A991b.2.b.

• Part Status

  Obsolete

• HTS

  8542.32.00.41

• Automotive

  Yes

• PPAP

  Unknown

• Chip Density (bit)

  9M

• Number of Words

  256K

• Number of Bits/Word (bit)

  36

• Architecture

  Flow-Through

• Data Rate Architecture

  SDR

• Address Bus Width (bit)

  18

• Number of Ports

  4

• Timing Type

  Synchronous

• Max. Access Time (ns)

  8.5

• Maximum Clock Rate (MHz)

  100

• Process Technology

  90nm

• Minimum Operating Supply Voltage (V)

  3.135

• Typical Operating Supply Voltage (V)

  3.3

• Maximum Operating Supply Voltage (V)

  3.6

• Operating Current (mA)

  180

• Minimum Operating Temperature (°C)

  -40

• Maximum Operating Temperature (°C)

  125

• Supplier Temperature Grade

  Automotive

• Packaging

  Tape and Reel

• Mounting

  Surface Mount

• Package Height

  1.4

• Package Width

  14

• Package Length

  20

• PCB changed

  100

• Standard Package Name

  QFP

• Supplier Package

  TQFP

• Pin Count

  100

• Lead Shape

  Gull-wing