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CY62177G3055ZXIT|INFINEON|simage
CY62177G3055ZXIT|INFINEON|limage
SRAM Chip

CY62177G30-55ZXIT

SRAM Chip Async Single 3V/3.3V 32M-bit 4M/2M x 8/16-bit 55ns 48-Pin TSOP-I T/R

Infineon Technologies AG
Datasheets 

Product Technical Specifications
  • EU RoHS
    Compliant
  • ECCN (US)
    3A991.b.2.a
  • Part Status
    Active
  • HTS
    EA
  • Automotive
    No
  • PPAP
    No
  • Chip Density (bit)
    32M
  • Number of Words
    4M/2M
  • Number of Bits/Word (bit)
    8/16
  • Data Rate Architecture
    SDR
  • Address Bus Width (bit)
    21
  • Number of Ports
    1
  • Timing Type
    Asynchronous
  • Max. Access Time (ns)
    55
  • Minimum Operating Supply Voltage (V)
    2.2
  • Typical Operating Supply Voltage (V)
    3|3.3
  • Maximum Operating Supply Voltage (V)
    3.6
  • Operating Current (mA)
    45
  • Minimum Operating Temperature (°C)
    -40
  • Maximum Operating Temperature (°C)
    85
  • Supplier Temperature Grade
    Industrial
  • Packaging
    Tape and Reel
  • Mounting
    Surface Mount
  • Package Height
    1.05(Max)
  • Package Width
    18.4
  • Package Length
    12
  • PCB changed
    48
  • Standard Package Name
    SO
  • Supplier Package
    TSOP-I
  • Pin Count
    48
Order Quantity

Documentation and Resources

Datasheets
Design resources