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CY62138FV30LL45ZAXA|INFINEON|simage
CY62138FV30LL45ZAXA|INFINEON|limage
SRAM Chip

CY62138FV30LL-45ZAXA

SRAM Chip Async Single 2.5V/3.3V 2M-bit 256K x 8 45ns 32-Pin STSOP-I Tray Automotive AEC-Q100

Infineon Technologies AG
Datasheets 

Product Technical Specifications
  • EU RoHS
    Compliant
  • ECCN (US)
    3A991b.2.a.
  • Part Status
    Obsolete
  • HTS
    8542.32.00.41
  • Automotive
    Yes
  • PPAP
    Unknown
  • Chip Density (bit)
    2M
  • Number of Words
    256K
  • Number of Bits/Word (bit)
    8
  • Data Rate Architecture
    SDR
  • Address Bus Width (bit)
    18
  • Number of Ports
    1
  • Timing Type
    Asynchronous
  • Max. Access Time (ns)
    45
  • Minimum Operating Supply Voltage (V)
    2.2
  • Typical Operating Supply Voltage (V)
    2.5|3.3
  • Maximum Operating Supply Voltage (V)
    3.6
  • Operating Current (mA)
    18
  • Minimum Operating Temperature (°C)
    -40
  • Maximum Operating Temperature (°C)
    85
  • Supplier Temperature Grade
    Automotive
  • Packaging
    Tray
  • Mounting
    Surface Mount
  • Package Height
    1.05(Max)
  • Package Width
    11.9(Max)
  • Package Length
    8.1(Max)
  • PCB changed
    32
  • Standard Package Name
    SO
  • Supplier Package
    STSOP-I
  • Pin Count
    32
  • Lead Shape
    Gull-wing

Documentation and Resources

Datasheets
Design resources