SRAM Chip

CY62126EV30LL-55ZSXE

SRAM Chip Async Single 3V 1M-bit 64K x 16 55ns 44-Pin TSOP-II Tray Automotive AEC-Q100

Infineon Technologies AG

Product Technical Specifications

• EU RoHS

  Compliant

• ECCN (US)

  EAR99

• Part Status

  Active

• HTS

  8542.32.00.41

• Automotive

  Yes

• PPAP

  Unknown

• Chip Density (bit)

  1M

• Number of Words

  64K

• Number of Bits/Word (bit)

  16

• Data Rate Architecture

  SDR

• Address Bus Width (bit)

  16

• Number of Ports

  1

• Timing Type

  Asynchronous

• Max. Access Time (ns)

  55

• Minimum Operating Supply Voltage (V)

  2.2

• Typical Operating Supply Voltage (V)

  3

• Maximum Operating Supply Voltage (V)

  3.6

• Operating Current (mA)

  35

• Minimum Operating Temperature (°C)

  -40

• Maximum Operating Temperature (°C)

  125

• Supplier Temperature Grade

  Automotive

• Packaging

  Tray

• Mounting

  Surface Mount

• Package Height

  1.04(Max)

• Package Width

  10.26(Max)

• Package Length

  18.52(Max)

• PCB changed

  44

• Standard Package Name

  SO

• Supplier Package

  TSOP-II

• Pin Count

  44

• Lead Shape

  Gull-wing