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A3PN250VQG100|MICROCHP|limage
A3PN250VQG100|MICROCHP|simage
Field Programmable Gate Arrays - FPGAs

A3PN250-VQG100

FPGA ProASIC®3 nanoFamily 250KGates 1.5V 100-Pin VQFP Tray

Microchip Technology
Datasheets 

Product Technical Specifications
  • EU RoHS
    Compliant
  • ECCN (US)
    EAR99
  • Part Status
    Active
  • HTS
    8542.31.00.60
  • Automotive
    No
  • PPAP
    No
  • Family Name
    ProASIC®3 nano
  • Process Technology
    130nm
  • User I/Os
    68
  • Number of I/O Banks
    4
  • Number of Inter Dielectric Layers
    7
  • Number of Registers
    6144
  • Operating Supply Voltage (V)
    1.5
  • Device System Gates
    250000
  • Program Memory Type
    Flash
  • Embedded Memory (Kbit)
    36
  • Total Number of Block RAM
    8
  • Device Logic Gates
    250000
  • Number of Global Clocks
    18
  • Device Number of DLLs/PLLs
    1
  • Programmability
    Yes
  • Reprogrammability Support
    Yes
  • Copy Protection
    No
  • In-System Programmability
    Yes
  • Speed Grade
    STD
  • Minimum Operating Supply Voltage (V)
    1.425
  • Maximum Operating Supply Voltage (V)
    1.575
  • I/O Voltage (V)
    1.5|1.8|2.5|3.3
  • Minimum Operating Temperature (°C)
    -20
  • Maximum Operating Temperature (°C)
    85
  • Supplier Temperature Grade
    Commercial
  • Packaging
    Tray
  • Tradename
    ProASIC
  • Mounting
    Surface Mount
  • Package Height
    1
  • Package Width
    14
  • Package Length
    14
  • PCB changed
    100
  • Standard Package Name
    QFP
  • Supplier Package
    VQFP
  • Pin Count
    100
  • Lead Shape
    Gull-wing

Documentation and Resources

Datasheets
Design resources