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7UL2T02FKLF|TOSHIBA|simage
7UL2T02FKLF|TOSHIBA|limage
Logic Gates

7UL2T02FK,LF

NOR Gate 2-Element 2-IN 8-Pin US

Toshiba
Datasheets 

Product Technical Specifications
  • EU RoHS
    Compliant
  • ECCN (US)
    EAR99
  • Part Status
    Active
  • HTS
    EA
  • Logic Function
    NOR
  • Number of Elements per Chip
    2
  • Number of Element Inputs
    2-IN
  • Number of Output Enables per Element
    0
  • Number of Selection Inputs per Element
    0
  • Number of Element Outputs
    1
  • Maximum Propagation Delay Time @ Maximum CL (ns)
    6.5@2.3V to 2.7V|5.7@3V to 3.6V
  • Absolute Propagation Delay Time (ns)
    8.7
  • Maximum Low Level Output Current (mA)
    8
  • Maximum High Level Output Current (mA)
    -8
  • Minimum Operating Supply Voltage (V)
    2.3
  • Typical Operating Supply Voltage (V)
    2.5|3.3
  • Maximum Operating Supply Voltage (V)
    3.6
  • Maximum Quiescent Current (uA)
    1
  • Propagation Delay Test Condition (pF)
    15
  • Minimum Operating Temperature (°C)
    -40
  • Maximum Operating Temperature (°C)
    125
  • Mounting
    Surface Mount
  • Package Height
    0.7
  • Package Width
    2.3
  • Package Length
    2
  • PCB changed
    8
  • Supplier Package
    US
  • Pin Count
    8
Order Quantity

Documentation and Resources

Datasheets
Design resources